AMD has officially introduced the first processor with Zen 6 architecture – the Epyc 9996 Venice. This chip offers 256 cores and 512 threads, the highest count in AMD's history. The manufacturer claims up to 1.7x performance improvement over the previous Turin generation (Epyc 9965), and even 3.4x over the Intel Xeon 6980P. Compared to Nvidia Vera, it is 20% more.
AMD Epyc 9996 Venice Specifications
- Core count: 256 (Zen 6c) or 128 (standard Zen 6) or 96 (high-frequency variant)
- Thread count: 512
- L3 cache: up to 1024 MB (32 MB per CCD)
- Memory support: 16-channel MRDIMM at 12,800 MT/s or DDR5-8000 RDIMM
- Socket: SP7
- PCIe 6.0: 128 lanes in 1P, 160 in 2P
- TDP: 600 W (for tested models)
- Manufacturing process: TSMC N2 (2 nm)
According to AMD, Venice is built on the new Zen 6 architecture, which uses a chiplet design. Each CCD contains 32 Zen 6c cores and two I/O interfaces. Up to 8 CCDs can be installed, giving a maximum configuration of 256 cores. For comparison, the previous Epyc 9965 (Turin) had 192 cores and 12-channel memory.
Performance Benchmarks
AMD has released initial benchmark tests. In AI agent workloads, Venice achieved up to 2.2x improvement in throughput over Vera (SPECrate integer). On a per-core basis, Venice is 20% more powerful than Vera with 96 cores. In older tests like NGINX, SQL, or Redis, it outperforms Intel Xeon and the previous Turin generation by 2.6–3.4x depending on the workload.
AMD plans to release the full Venice family including Venice-X models with 3D V-Cache and Verano for AI hosting. Processors for the SP8 socket with fewer cores are expected in the first half of 2027.